The present invention relates to semiconductor devices and methods of manufacturing the semiconductor devices. More particularly, the invention relates to semiconductor devices and methods of manufacturing semiconductor devices having a formation of pure copper wiring in an ultra high-speed semiconductor device. The semiconductor device may also be used in certain discrete devices such as Intelligent Power Devices (IPD), which may be used in automobiles or other products.
Forming finer wiring for semiconductors results in a corresponding decrease in operating speed as a result of an increase in wiring resistance. Some attempts have been made to set wiring in an ultra high-speed device by means of Cu, which has an electric resistance smaller than that of Al alloys which are typically used.
Conventionally, reactive ion etching (RIE) using a resist as a masking material has been employed for forming wiring. According to this method, Al is etched in the form of a halide by exciting a gas containing fluorine, chlorine, bromine, and the like, in plasma.
Since Cu has a lower vapor pressure as a halide than Al, however, a temperature of 200xc2x0 C. to 300xc2x0 C. or higher is necessary to obtain a practical etching rate if the RIE method is used. Consequently, there have been various difficulties to overcome, such as manufacturing a chamber resistant to high temperature, increasing compatibility between etching and anisotropy, and selection of a masking material. In an attempt to overcome at least some of these difficulties, studies have been conducted on buried wiring using Cu without using the RIE method.
FIGS. 1A to 1D illustrate a typical method of forming Cu buried wiring. First, a groove 3 is formed in a layer insulating film 2 on a silicon substrate 1 according to a desired wiring pattern (FIG. 1A). A Cu film 5 is then formed on the insulating film 2, thus interposing an adhesive layer 4 for preventing the diffusion of Cu into the silicon, and the inside of the groove 3 is filled (FIGS. 1B and 1C). Thereafter, by eliminating the superfluous Cu film 5 remaining in other than groove 3 by means of a chemical mechanical polishing (CMP) method the Cu buried wiring 6 is formed (FIG. 1D). Such a method of forming buried wiring is not only a CMP technology, it is also a technology for filling up the groove 3 with Cu, which is highly difficult.
Technology for burying Cu can be roughly divided into two categories: a burying method carried out by depositing Cu similarly in the side face and the bottom surface of the groove by means of a CVD method, and a method of burying Cu in the groove after applying a heat treatment to Cu deposited by means of a sputtering method.
Much still remains unknown, however, about the Cu burying method to which the CVD method is applied. For example, little is known about mass production of the CVD method. It is possible that the Cu burying method, which may utilize Cu sputtering, may be the first mass production technology.
For heat treatments, there are two ways the Cu burying method may use the sputtering method. One is to heat the silicon substrate during Cu sputtering, and the other is to heat Cu deposited by means of sputtering.
The latter way of heating Cu after sputtering is further divided into a heating furnace method, by which the entire silicon substrate is heated within a fixed period by using a heating furnace, and a laser irradiation method, by which Cu is heated to a temperature higher than in the case of the heating furnace method by irradiating the same with a short wavelength laser only for an extremely short period of 1 millisecond or less.
The foregoing methods, however, have not yet provided the degree of Cu burying necessary for its application to a next-generation ultra high-speed device having a fine contact hole and the like.
FIGS. 2A to 2D illustrate a method of forming a fine contact hole using Cu. First, a connecting hole 7 with a depth reaching the surface of the silicon substrate 1 is formed in the insulating film 2 on the silicon substrate (FIG. 2A). The opening dimension of connecting hole 7 is set to, for instance, 0.35 xcexcm in diameter and 1.0 mm in depth.
Then, a Cu film 5 with a thickness of 1 xcexcm is formed on the insulating film 2 by means of the sputtering method, following an adhesive layer 4 with a thickness of 10 nanometers (nm) (FIG. 2B). The Cu film 5 is then heated, for example, by irradiation of a laser, and connecting hole 7 is filled up (FIG. 2C). A Cu fine contact hole 8 is then formed by eliminating the superfluous Cu film 5 remaining in other than the connecting hole 7 using the CMP method (FIG. 2D).
In the Cu fine contact hole 8 formed in the above-described manner there is a problem that a void 9 is easily created. This problem occurs because of the low degree of Cu burying. More particularly, this problem occurs because it is difficult to completely fill up connecting hole 7 with Cu in which an aspect ratio (the ratio of the depth against the diameter of the connecting hole) is high. For instance, a void is created when an aspect ratio is 1.25 or higher. For example, where the diameter is 0.8 xcexcm or lower against a depth is 1.0 xcexcm.
Creation of void 9 results in a partial increase in the density of current flowing in the upper and lower directions of fine contact hole 8 during the operation of the device. This causes a reduction in reliability.
As is apparent from the foregoing, the application of Cu buried wiring to the next-generation ultra high-speed device has not yet been realized because of the insufficient degree of Cu burying.
As described above, it has conventionally been difficult to apply Cu buried wiring to the next-generation of ultra high-speed devices due to the insufficient degree of Cu burying. Thus, one object of the present invention is to provide a manufacturing method of a semiconductor device, wherein the degree of Cu burying can be heightened and buried wiring using Cu can be applied to next-generation ultra high-speed devices.
In accordance with a first aspect of the present invention, in a method of manufacturing a semiconductor device having buried-type wiring in an insulating film on a semiconductor substrate, the buried-type wiring is formed by using highly pure Cu with a low oxygen content.
In accordance with a second aspect of the present invention, a manufacturing method of a semiconductor device comprises the steps of forming a recessed part, which is used for formation of wiring in an insulating film on a semiconductor substrate; forming a highly pure Cu film with a low oxygen content on the surface of the insulating film, in which the recessed part is formed, interposing a barrier metallic film; burying the Cu film in the recessed part after applying a heat treatment to the Cu film; and eliminating the unnecessary Cu film, which remains on the surface of the insulating film except in the recessed part.
In yet another aspect of the invention, a Cu film is deposited over a dual-layer metallic barrier having particular characteristics. For example, the barrier may be comprised of Ti and TiN. Other single-layer or dual-layer structures having similar characteristics may also be used. This combination of highly pure Cu and a barrier layer allows use of lower power lasers, lower annealing temperatures, and hot Cu sputtering.
The method of manufacturing a semiconductor device provided by the present invention facilitates surface diffusibility and fluidity of Cu. This makes it possible to bury Cu even in a fine recessed part in which voids have conventionally been created.
Additional object and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The object and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.